| # | Project | Org | KCF | Layer | Diamond |
|---|---|---|---|---|---|
| 1 | Studio | caid-technologies | 10 | L1 | Prompt→3D pipeline: PEMCLAU→LAAM→OCCT→γ₁ STL |
| 2 | SimCorrect | caid-technologies | 9 | L1 | Dual-silo fault detection: γ₁ is ground truth arm |
| 3 | openscad-wasm | openscad | 9 | L2 | In-browser 3D SCAD: adelic spine in 3D, no server |
| 4 | SolidDesigner | Ludwigstrasse | 8 | L3 | Feature-tree DAG + OCCT: fleet data model architecture |
| 5 | IfcOpenShell | Ludwigstrasse | 8 | L3 | IFC+HL7 = complete sovereign data layer |
| 6 | OpenCAD | caid-technologies | 7 | L4 | Modular Python CAD: kernel+solver+agent |
| 7 | MCAD | openscad | 7 | L5 | 680★ parametric library: hardware models |
The Studio architecture separates perception (PEMCLAU) from generation (LAAM) from compilation (OCCT). The geometry compiler is deterministic — no LLM can hallucinate a wrong radius. γ₁ stamps every output model. The fleet's engineering floor speaks geometry, not prose.
SimCorrect proved that an 80mm geometry error is invisible to joint encoders — the machine does exactly what it's told, but what it's told is wrong. The fleet equivalent: a silo running the right code on wrong data. γ₁ is the ground truth. When a silo diverges from γ₁-expected behavior, SimCorrect's pattern applies: detect divergence, identify parameter, correct autonomously, verify. This is PTTE made operational.
| SimCorrect Fault | Fleet Equivalent | Detection | Correction Time |
|---|---|---|---|
| Forearm length error | Wrong corpus scan path | PEMCLAU divergence | <1s |
| Wrist lateral offset | Wrong IP routing | MECRDS probe | <0.3s |
| Joint friction fault | LLM timeout/degradation | Heartbeat miss | <5s |
| Base encoder offset | Wrong γ₁ constant | PTTE floor check | immediate |
| Tool mass mismatch | Wrong model loaded | KCF score drop | <30s |
// EOSE Fleet Adelic Spine — γ₁=14.134725141734693 // r_adelic(l) = γ₁/(l+1) gamma1 = 14.134725141734693; function r_adelic(l) = gamma1 / (l + 1); // Silo positions on adelic spine module silo(name, layer, vram_gb, color_r, color_g, color_b) { r = r_adelic(layer); translate([layer * 30, 0, 0]) color([color_r, color_g, color_b]) cube([r * 2, r * 2, vram_gb / 4], center=true); } // Fleet topology silo("msi01", 0, 24, 1.0, 0.84, 0.16); // gold - L0 silo("msclo", 1, 24, 0.23, 0.56, 1.0); // blue - L1 silo("yone", 1, 16, 0.65, 0.44, 0.98); // purple - L1 silo("forge", 1, 24, 0.98, 0.45, 0.13); // orange - L1 silo("lilo", 2, 24, 0.13, 0.85, 1.0); // cyan - L2 silo("pcdev", 2, 32, 0.13, 0.76, 0.33); // green - L2 silo("lounge", 2, 24, 0.6, 0.6, 0.6); // gray - L2 // Adelic spine (golden connectors) for (l = [0:12]) { translate([l * 30 + 15, 0, 0]) color([1, 0.84, 0.16]) cylinder(h=1, r=0.5); }
This SCAD model renders the fleet topology as 3D geometry. Box width = r_adelic(layer). Box height = GPU VRAM. Run it at openscad-playground or embed via openscad-wasm at /opencad-live (coming).
γ₁=14.134725141734693
as the temporal anchor.
ANCHOR
14.134
GROUND
cable paths — all IFC entities
stamped to γ₁.
| IFC Entity | Fleet Analog | Description |
|---|---|---|
| IfcSite | AKS cluster | Top-level deployment environment |
| IfcBuilding | Silo node | Physical/virtual compute unit |
| IfcSpace | Docker network | Isolated namespace / subnet |
| IfcElement | Container / Pod | Running workload unit |
| IfcPropertySet | MECRDS CRD | Typed configuration metadata |
L0 = msi01 · L1 = msclo/yone/forge · L2 = lilo/pcdev/lounge
- RFC-V13-001 — Floor coordinate system definition
- RFC-V13-002 — γ₁ stamp format and validation
- RFC-V13-003 — SimCorrect dual-silo deploy pattern
- RFC-V13-004 — OpenSCAD-WASM browser render spec
- RFC-V13-005 — IFC+HL7 unified data layer protocol